Avaya Using Technician Interface Scripts Manual do Utilizador Página 632

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Using Technician Interface Scripts
2-580
Frame Type Framing format. The following two framing formats differ in the
number of frames per superframe and in the use of the F-bit
position. A frame comprises 24 timeslots of 8-bit data preceded by
a bit called the F-bit.
D4 – Twelve frames make up a superframe. The F-bit provides
frame and multiframe alignment information.
ESF – Twenty-four frames make up a superframe (extended
superframe). The F-bit provides Facility Data Link (FDL) and
CRC information as well as frame and multiframe alignment
information.
Line Bldout T1 transmit power level measured in length of cable connecting the
router and associated T1 equipment; ranges from 1 to 655 feet.
B8ZS Support Status of Bipolar Eight Zero Substitution — On or Off. B8ZS
maintains sufficient “ones” density requirements within the T1 data
stream without disturbing data integrity.
Clock Mode Source of the T1 transmit clock, as follows:
Internal – Clock is generated internally.
Slave – Clock is derived from the incoming data stream.
Manual – Jumpers on the T1 Link Module determine the clock
source (Internal or Slave).
MiniDacs Configuration Function assigned to each of 24 DS0 channels (timeslots). The
table shows these functions in a string of 24 characters, one
character per channel. The characters and their meaning are as
follows:
1Assigns the timeslot to the first HDLC controller (Circuit 1).
2Assigns the timeslot to the second HDLC controller (Circuit
2).
DAssigns the timeslot to data passthrough (HDLC controller to
HDLC controller).
IAssigns the timeslot to idle.
VAssigns the timeslot to voice passthrough (HDLC controller
to HDLC controller).
For example, the sample display shows the Mini Dacs
Configuration on circuit 21 as:
1111111111111111IIIIIIII.
This string shows timeslots 1 - 16 assigned to the HDLC controller
(1) and timeslots 17 - 24 idle (I).
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